Keynote Speakers
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Scalable solutions for telecommunications network design and optimization by Moshe Zukerman
City University of Hong Kong, China
Abstract Keynotes Slide can be download Here! We will discuss two important and practical networking research problems. The first is how to optimize the design of a multilayer telecommunications network, where the traffic streams follow realistic traffic models including Gaussian and Poisson Pareto Burst Process (PPBP), for which we provide a validated polynomial time heuristic algorithm for optimal capacity assignment at each layer. The second is how to provide path planning for telecommunications cables. Considering the facts that billions of dollars are spent every year on new cables, and that the current practice for cable path planning is a manual approach, there is a clear urgent need for development of software for optimal cable path planning. Cable path planning optimization is a multi-objective optimization problem that aims to trade off cost versus risk to the cable of various human and natural causes subject to constraints associated with the terrain characteristics, human activities and legal-regulatory restrictions. Cable path planning must be scalable and this is a challenge because the data required and used on the earth surface and ground motion is of a very high resolution. Notice that path decisions are made meter by meter and path lengths are of thousands of kilometers. We will present a scalable solutions based on the Fast Marching Method (FMM) for his important problem of cable path planning. This work was funded by the following grants from the Research Grants Council of the Hong Kong Special Administrative Region, China: CityU 123012, CityU 11200417 and CityU 8/CRF/13G.
Biography 
Moshe Zukerman is a Chair Professor of Information Engineering in the Electronic Engineering Department of City University of Hong-Kong. His research focuses on performance evaluation, resource allocation and survivable design of telecommunications networks and systems.
He received B.Sc. and M.Sc. degrees from the Technion, Israel and a Ph.D. degree from UCLA in 1985. During 1986-1997 he was with Telstra Research Laboratories and during 1997-2008 with The University of Melbourne. He has served on editorial boards of various journals and on technical and organizing committees of numerous conferences. He has over 350 publications in scientific journals and conference proceedings. He is a Fellow of the IEEE.A Closed-loop Brain-Machine Interface: The Next Frontier by Jan Van der Spiegel
University of Pennsylvania, USA
Abstract Keynotes Slide can be download Here! A brain-machine interface (BMI) is one of the most important tools in neuroscience research and neuro-prosthetics development. Research on BMI has achieved significant progress in the past decade. However, several bottlenecks from the electrical engineering perspective still have to be overcome. The next generation BMI system needs to feature a bi-directional neural interface with on-chip neural feature extraction and machine learning. This presentation will review the state-of-the-art designs, summarizes the key design requirements and challenges in a BMI system, and provides insights in both circuit and system level design.
Biography 
Jan Van der Spiegel is a Professor of the Electrical and Systems Engineering Department at the University of Pennsylvania. Dr. Van der Spiegel received his Ph.D. degree in Electrical Engineering from the University of Leuven, Belgium. His primary research interests are in mixed-mode VLSI design, CMOS vision sensors for polarization imaging, biologically based sensors and brain-machine interfaces. He was a distinguished visiting professor at Tsinghua University, China, from Sept 2017 till Feb. 2018.Van der Spiegel is a Life Fellow of the IEEE, a Distinguished Lecturer of the Solid-State Circuit Society, is the recipient of the IEEE Major Educational Innovation Award, and the IEEE Third Millennium Medal. He is an Associate Editor of the Transaction of BioCAS, a member of the Editorial Board of the IEEE Proceedings, and Section Editor of the J. of Engineering of the IET. He served as president of the IEEE Solid-State-Circuits Society (2016-2017).
